Can anyone please tell me the source of +5V_VCC1 on the schematic attached with this post.
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Help me understand this schematic
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Re: Help me understand this schematic
As per datasheet, VCC (pin 3) is connected to PVCC (pin 19, VDD on schematics) through a 10 ohm resistor internal to the PM6686 chip.OpenBoardView — https://github.com/OpenBoardView/OpenBoardView
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Re: Help me understand this schematic
Originally posted by ktmmotocross View Postlooks like its just badly marked +5V switched from +5V_S5 by PQ62
just diode probe its trace from it
maybe I am wrong...
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Re: Help me understand this schematic
Originally posted by piernov View PostAs per datasheet, VCC (pin 3) is connected to PVCC (pin 19, VDD on schematics) through a 10 ohm resistor internal to the PM6686 chip.
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Re: Help me understand this schematic
Maybe PC191 is shorted or PU9 is bad then.OpenBoardView — https://github.com/OpenBoardView/OpenBoardView
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Re: Help me understand this schematic
IC replaced with a new one. Now I have LDO and 3VPCU
BUT I do not have +3V , no MAIND signal and no 5V as well.
Please refer to the image. I am having a hard time trying to figure out why 15VCPU is 10V .
Please note PC191 is currently removed and I feel it should make no difference.Last edited by IamPritesh; 02-28-2019, 12:46 AM.
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Re: Help me understand this schematic
Missing 5V from PU9?
Do you have s5_on? To explain missing 5V from PU9.
Dickson charge pump
https://www.youtube.com/watch?v=I4ED_8cuVTU
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Re: Help me understand this schematic
Originally posted by khaahk View PostMissing 5V from PU9?
Do you have s5_on? To explain missing 5V from PU9.
Dickson charge pump
https://www.youtube.com/watch?v=I4ED_8cuVTU
SIO chip does have VCC voltage coming from 3VPCU. I was wondering if VDD is essential on SIO chip before S5_ON is generated ?Last edited by IamPritesh; 03-02-2019, 12:57 AM.
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Re: Help me understand this schematic
SIO VDD should come after maind signal, which in turn seems to come after run_on signal.
Does SIO give 3V to power button? After pressing power button does it give impulse to PCH (EC_PWRBTN# goes low for a short time)? Does PCH respond with pulling SLP_S4 and S3 high?
How much current is drawn before pushing power button and does it change?
Resistances on +3V and +5V rails - maybe there is low resistance after PQ62 and PQ45?
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Re: Help me understand this schematic
Originally posted by khaahk View PostSIO VDD should come after maind signal, which in turn seems to come after run_on signal.
Does SIO give 3V to power button? After pressing power button does it give impulse to PCH (EC_PWRBTN# goes low for a short time)? Does PCH respond with pulling SLP_S4 and S3 high?
How much current is drawn before pushing power button and does it change?
Resistances on +3V and +5V rails - maybe there is low resistance after PQ62 and PQ45?
There resistance on PQ62isa and PQ45 output is around 300 ohms.
What could be causing this, i am running out of ideas what to check.
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Re: Help me understand this schematic
Originally posted by khaahk View PostHow much current is drawn from adapter before pushing power button?
300 ohms seems a little low but not sure.
Could this be a case of faulty SIO chip ? Anything I can do test this chip ?
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Re: Help me understand this schematic
0.03A is a bit too much, but too little to find anything by heat i think.
Check if sio tries to read it's program from KU3, pin 2,5,6.
You can also inject directly 3v after PQ45 to see if anything heats abnormally.
Seems like a hard to find fault you got there.
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