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Help with an HP / Agilent / Keysight 16702B and 16717A

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    Help with an HP / Agilent / Keysight 16702B and 16717A

    Hello,

    I'm getting ready to use my logic analyzer for the first time today. I've decided to try out my 16717A module. I'm having some questions though.

    Here's a link to the information on the 16717A:



    This is the terminology I'm using, please correct me if I'm wrong.

    The cables that hook directly into the 16717A are called probes. At the end of each probe, there's a header for a pod. A pod hooks into the probes. Each pod has 18 wires, 0-15, GND and CLK. I know what to do with the CLK and GND. I'm hooking those little grabbers up to each wire. This is where I'm getting confused.

    Each wire that comes off the pod has a little connector on it. One has a wire coming off of it. This wire I hook into the grabber. The other part of the connector says the word GND. What is that for? Do I really need to hook a gnd to each and every wire? That'd be insane. I can send pics if you guys want to see what I'm talking about so it's more clear.
    -- Law of Expanding Memory: Applications Will Also Expand Until RAM Is Full

    #2
    Re: Help with an HP / Agilent / Keysight 16702B and 16717A

    Here's some pictures, sorry they're so dark.

    The first is what I call a probe but I might be wrong. The pod hooks into that.

    The 2nd is the pod being hooked in.

    The 3rd is one of the various connectors that come off the pod. This is where I'm getting confused.

    The 4th is the other side of the same connector.

    The 5th is with one of the grabbers hooked up. What the heck is the GND used for in the 3rd picture?
    Attached Files
    -- Law of Expanding Memory: Applications Will Also Expand Until RAM Is Full

    Comment


      #3
      Re: Help with an HP / Agilent / Keysight 16702B and 16717A

      Page 13:
      When connecting logic analyzer probes to the device under test:
      1. Attach the logic analyzer probes to the device under test in a way that
      keeps logically-related channels together.
      2. Be sure to ground each pod.

      You can try using just that one common GND and see.
      Last edited by budm; 02-10-2017, 10:45 PM.
      Never stop learning
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        #4
        Re: Help with an HP / Agilent / Keysight 16702B and 16717A

        Originally posted by budm View Post
        Page 13:
        When connecting logic analyzer probes to the device under test:
        1. Attach the logic analyzer probes to the device under test in a way that
        keeps logically-related channels together.
        2. Be sure to ground each pod.

        You can try using just that one common GND and see.
        I tried that when I was trying to read the data coming and going from the EEPROM. The module I have allows me to use the device under test's clock signal or use an independent clock signal. Tomorrow, I'll try hooking it all back up again but selecting the independent clock signal, so I can see if there's data or not. I'll also maybe try with a push button or something.

        Now, the mode I had it in, it said it needed the second pod. But I didn't have anything hooked up to it. I'm not sure what that was all about. I'm pretty certain I configured it correctly, but I still have to verify a few things. I'll play around with maybe a push button and make sure I got the hang of it before I try throwing it on the EEPROM again.

        Thanks Budm!
        -- Law of Expanding Memory: Applications Will Also Expand Until RAM Is Full

        Comment


          #5
          Re: Help with an HP / Agilent / Keysight 16702B and 16717A

          It's been a while since I used one of those, but I believe you need to unassign/remove the second pod from your configuration data. I think if you have two pods assigned to the same logic group,I don't remember what it's actually called, it will only recognize the clock coming from one of the pods.

          Don't forget you need to make sure your logic levels are set correctly for the device under test.
          Last edited by srhofmann; 02-11-2017, 12:01 AM.

          Comment


            #6
            Re: Help with an HP / Agilent / Keysight 16702B and 16717A

            Srhofmann,

            Thank you for your advice. I tried removing the second pod from the configuration and that's when it said it was required for the timing mode that I had. I will try again with different configurations.

            I have the datasheet for the EEPROM ( http://www.datasheetspdf.com/PDF/25Q16BSIG/865306/1 ). There's a Click to Download PDF file link but it's a bit hidden there. In the preview window of the datasheet, it's off to the right a bit.

            Anyway, for the logic levels, I tried two things. I saw the chip was getting around 3.320VDC, so the first time, I picked the option that said 3.3V (1.65V). But after reading through the datasheet, I thought maybe that was incorrect. I saw on page 27 (I believe) this little chart:
            Code:
            Symbol  Parameter     Test Condition  Min.  Typ  Max.     Unit.
            --------------------------------------------------------------------------------
            VIL  Input Low Voltage            -0.5      0.2VCC    V
            VIH  Input High Voltage           0.7VCC     VCC+0.4   V
            VOL  Output Low Voltage  IOL =1.6mA            0.4     V
            VOH  Output High Voltage  IOH =-100μA    VCC-0.2           V
            So, I manually configured the TTL to 0.7VDC.

            I also had grabbers setup like this:
            Code:
            1 on CS#
            1 on SO
            1 on WP#
            GND for the pod was attached to VSS
            nothing on VCC
            1 on HOLD#
            CLK for the pod was attached to SCLK
            1 on SI
            Then, in my Logic Analyzer's GUI, I configured it so each pin was separate, instead of having one label or whatever that had all the pins enabled.

            For example, I labeled the first pin CS# then I told it to only monitor that one grabber, nothing else

            Then I added a 2nd label and called it SO and told it to only monitor that second grabber, nothing else.

            I added one for SCLK but selected the J clock for the pin to monitor, because I was using POD 1 which had the "J" clock.
            -- Law of Expanding Memory: Applications Will Also Expand Until RAM Is Full

            Comment


              #7
              Re: Help with an HP / Agilent / Keysight 16702B and 16717A

              Even with the scope, there's nothing on the SCLK. I even verified the scope was working by using the test probe / calibration part of it. I get a square wave on the test probe / calibration hook but nothing on the SCLK pin.

              I'm going to copy and paste this into the TV subforum where I've been working so people know. But until I get that clock pulse, I don't think there's anything I can do with the logic analyzer....
              -- Law of Expanding Memory: Applications Will Also Expand Until RAM Is Full

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