IBM, having recently (within the last two years I believe) broken the size barrier and can now manufacture transistors that are 2 nanometers in size, which is roughly 4 to 10 times the size of an atom, they claim they can get 50 BILLION transistors on a wafer the size of a fingernail ... it makes me wonder ...
How on Earth does a schematic that large even get designed in the first place? Is CPU Engineering nothing more than a set of algorithms that place the transistors onto the schematic? No human being could possibly design something at that scale and keep track of whats going on in the circuit.
Anyone out there have any idea how these things are designed?
How on Earth does a schematic that large even get designed in the first place? Is CPU Engineering nothing more than a set of algorithms that place the transistors onto the schematic? No human being could possibly design something at that scale and keep track of whats going on in the circuit.
Anyone out there have any idea how these things are designed?
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